1. Field of the Invention
The present invention relates generally to voltage regulators, and more particularly to a frequency sensing voltage regulator that uses the system operating frequency to limit the amount of current delivered to a load, thereby regulating the variance of the supply voltage to the load.
2. Description of the Related Art
Voltage regulator circuits are known in which a voltage supply to a load is regulated by controlling the current supplied to the load. Typical of such prior art structures is the use of a negative feedback circuit for sensing the output voltage and/or output current which is used for comparison with a reference voltage/reference current. The difference between the output and the reference signal is used to adjust the current supplied to a load.
There are problems, however, with such voltage regulators. A considerable amount of power is drawn, and thus heat dissipated, because of the use of the negative feedback circuit. In addition, the negative feedback circuit decreases the response time to sharp current fluctuations. Furthermore, the comparator circuits and reference level generating circuits take up considerable layout area when the voltage regulator is incorporated in an integrated circuit (IC) structure.
Additional problems also occur when a voltage regulator is used to regulate the supply voltage to a synchronous device, such as a synchronous memory device, for example an SRAM. In an SRAM, an external supply voltage, Vcc, must be maintained within a predetermined level. The external supply voltage Vcc must be regulated to produce a regulated Vcc value during periods of considerable current fluctuation. For example, an SRAM load current may quickly fluctuate between microamps and milliamps during use. Such changes in the load current can cause significant variation on the regulated Vcc value, which can result in improper operation of the SRAM or possibly even damage to the SRAM.
Thus, there exists a need for a voltage regulator that is easy to implement, does not occupy significant layout area when the voltage regulator is incorporated in an integrated circuit (IC), and provides a minimal variance of the supply voltage Vcc over a wide current range.
The present invention is designed to mitigate problems associated with the prior art by providing a frequency sensing NMOS voltage regulator that is easy to implement, does not occupy significant layout area when the voltage regulator is incorporated in an integrated circuit (IC), and provides a minimal variance of the supply voltage Vcc over a wide current range. The present invention takes advantage of the fact that current tracks frequency in a linear fashion for synchronous systems.
In accordance with the present invention, a NMOS source follower transistor has a gate connected to a fixed gate voltage, a drain coupled to an external supply voltage through a PMOS switching transistor, and a source connected to a load. The gate of the PMOS transistor is controlled by a delay circuit through which the clock pulse of the system is passed. Through the use of the delay circuit and the PMOS transistor, the amount of current provided by the NMOS transistor is made a function of the cycle rate of the clock pulse, tracking the current requirements of the load. This results in a reduced variance of the regulated supply voltage Vcc over a wide current range.
These and other advantages and features of the invention will become apparent from the following detailed description of the invention which is provided in connection with the accompanying drawings.